1. Field of the Invention
This invention relates generally to methods and systems for fabricating solar cells. More particularly, it relates to fabricating an array of solar cells by simultaneously processing commonly supported mother wafers, enabling the simultaneous growth of multiple photovoltaic cell structures.
2. Description of the Related Art
Silicon is the basic ingredient of many solar cell technologies ranging from thin film amorphous silicon solar cells to single-crystal silicon wafer-based solar cells. High efficiency solar cells start with electronic grade polysilicon grown by chemical vapor deposition. The polysilicon is melted and ingots are pulled from the melt in the Czochralski process and often zone refined to produce silicon ingots or ribbons of different degrees of crystal perfection. The silicon ingot is then sliced into thin wafers by sawing or laser cutting, and solar cells are formed on the wafers by traditional semiconductor techniques and interconnected and packaged to last at least 25 years. Such silicon wafers are relatively expensive and thus severely impact the costs of solar cells in formed and packaged in the standard wafers.
Throughout the past quarter century, there have been significant innovations in all aspects of solar cell manufacture and accompanying reduction in cost. For example, from 1990 to 2006, wafers have decreased in thickness from 400 μm to 200 μm. The cost of crystalline silicon still constitutes a significant part of the overall cost, as measured by many of the metrics used to characterize the cost of crystalline solar technology.
A flow chart of a conventional process for manufacturing solar panels is illustrated in FIG. 1. In step 102, stock single-crystal silicon wafers are used as substrates for fabricating in step 104 the structure of the photovoltaic (PV) cell structure, which is basically a diode on the top surface of the wafers. The fabrication process uses epitaxial or diffusion furnace methods to form the required thin silicon layers doped n-type and p-type and sometimes intrinsic (i-type). After the PV cells have been fabricated, in step 106, the wafers are cut into “tiles”, which are typically approximately square, often with rounded corners due to the size and shape of the original wafer (200 mm diameter typically), which is slightly smaller than the diagonal dimension of the square PV wafer. The wafer tiles are then assembled into an X-Y array on a substrate 108 and contacts to the n-type and p-type layers are added, often by soldering tinned copper ribbons to bus bars grown on the PV wafers. It has been difficult or impossible to attain very think solar cells using the prior art process in which individual PC cells are formed prior to assembly into the final X-Y array needed for a completed solar panel.
The best expectation for further reductions in silicon thickness, and thereby the cost of monocrystalline silicon solar cells, is offered by techniques in which a crystal monocrystalline silicon substrate, often referred to as the base, source or mother wafer, is first treated to form a separation layer, a thin epitaxial silicon layer is then deposited on the treated surface, and finally the deposited epitaxial layer is separated from the source substrate to be used as thin (2-100 μm) single crystal silicon solar cells. The silicon substrate is thereafter sequentially re-used to form several additional such epitaxial layers, each producing its own solar cell. There are several known standard techniques for growing the separation layer, such as forming a composite porous silicon layer by anodically etching a discontinuous oxide masking layer, or by high energy implantation of oxygen or hydrogen to form the separation layer within mother wafer.
The epitaxial silicon layer that is formed has to be separated intact from the mother wafer with little damage in order to thereafter fabricate the eventual solar cell module. The separation may be preceded by formation of the p-n junctions and of part or all of the interconnections while the epitaxial layer is still attached to the mother wafer. We believe that this separation process is preferably done by ‘peeling’ in the case where the separation layer is highly porous silicon. Peeling implies parting of an interface starting from one edge and continuing until complete separation occurs.
One basic process in the prior art for manufacturing epitaxial single crystal silicon solar modules includes the following steps: (1) forming a separation layer on a relatively thick, single crystal silicon substrate; (2) growing a single crystal epitaxial layer and fabricating the solar cells on the epitaxial layer and the basic cell interconnections on the solar cells; (3) separating the epitaxial layer at the cell level; and (4) assembling and packaging several such cells to form a solar panel. Despite the great potential of this prior art method for producing relatively inexpensive, highly efficient solar cells, the method has eluded commercial success for at least three main reasons: (1) some of the unit processes are deficient and difficult to reproduce; (2) manufacturing strategy generally starts and ends with making individual wafer-size solar cells and, thereafter, assembling them into solar panels; and (3) thin cells break easily, and their economical processing awaits the development of new tools and equipment.